PC - [*ms] This register holds the address or location of the next instruction to be executed/fetched, its content is copied to the MAR at start of FDE. It is incremented by one on every cycle. It can be changed by branch/jump instructions, accumulator - [*ms] This register holds all input/output data. It holds results of calculations from the ALU. It is also checked for conditional branching (e.g. BRZ). It also stores data which has come from the MDR or RAM., MAR - This register holds the address in memory where the processor is required to fetch or store data to or from., MDR - This register temporarily holds data moving between the processor and main memory., cores - This is found within the processor, having these allows multiple events to be processed at they same time provided the program is written in a parallel fashion. They contain their own registers and ALU, but not a control unit as a CPU only has one of these i.e. the Von Neumann architecture., Von Neumann - The computer architecture that means the data and instructions are stored in the same RAM. This causes a bottleneck., RAM - This is the type of memory in which the instructions are stored. In fact all applications must be run from this type of memory., ALU - This is part of the CPU that performs any logical operations and perform instructions such as ADD, clock - This synchronises the events in the computer, a "fast" one means more instructions can be carried out per second. Its "speed" is measured in hertz., cache - This is high speed memory that is contained within the CPU, it stores recently accessed instructions which are more likely to be needed again. This means the slower RAM needs to be accessed less often, random - what "R" stands for in RAM, Data - Either data or instructions end up in this register after being fetched., registers - MAR; PC; MDR, CIR and the accumulators are all examples of ..., access - what "A" stands for in RAM, address - At the start of the fetch cycle the PC value is written into this register. , buses - These connect RAM and the CPU, there are three, the control, data and address...., next - The PC contains the address of the ........ instruction., fetch - During this part of the CPU cycle either data or instructions are returned from the RAM to the MDR, pipelining - This process means carrying out different parts of the FDE cycle concurrently.,

FDE and CPU

Drucken
Einbetten

Bestenliste

Visueller Stil

Einstellungen

Vorlage ändern

Soll die automatisch gespeicherte Aktivität wiederhergestellt werden?